In the field of digital communications, and particularly RF and broadband digital communications, modulators are required to operate at increasingly higher baud rates while complying with increasingly stringent spectral occupancy restraints. While data is converted into an analog form before being transmitted, a tremendous amount of digital processing is typically applied to the data before the data are actually converted into an analog form. This processing includes encoding, symbol generation, and filtering through sophisticated digital filters. The processing functions subsequent to symbol generation typically operate upon complex digital signals and therefore utilize processing resources to handle both in-phase and quadrature components of the complex signals. Typically, the digital processing requirements are met by sophisticated digital integrated circuits having many hundreds of thousands of logic gates.
Digital integrated circuits of this sophistication are desirably implemented using a complementary semiconductor process, such as CMOS. This type of semiconductor process achieves reliable results with sufficiently low power consumption so that the large number of needed logic gates can be combined on a common semiconductor substrate at low cost. Unfortunately, this type of semiconductor has an undesirably slow maximum operating speed when used as a digital modulator operating at the increased baud rates which are becoming popular. In order to compensate for slow maximum operating speed limitations, digital modulators often include on-chip processing resources for parallel processing.
Eventually, however, digital samples generated by such an integrated circuit are converted into an analog form for transmission. For high speed communications, the conversion process often requires many samples, which are generated by such an integrated circuit during each clock cycle of the circuit while operating near its maximum operating speed, to be combined together into a single stream and converted into a complex analog signal having in-phase and quadrature components. Moreover, for RF and wide-band communication systems, mixing functions are performed to tune the digital communication signal to a desired frequency band for transmission.
The combining and mixing functions have been the source of many problems in conventional digital communication modulators. One conventional technique for performing the combining and mixing functions multiplexes separate low speed, parallel in-phase data streams into a single high speed data stream and converts this high speed stream into an in-phase analog signal. The in-phase processing circuits are essentially duplicated for quadrature data streams. The resulting two in-quadrature analog signals are then up-converted using well-known mixing techniques. This technique is desirable because it is a relatively low power and inexpensive way to generate an RE transmission signal from parallel low speed data streams.
Unfortunately, this technique suffers from errors which are common in analog signal processing. In particular, the separate in-phase and quadrature analog signals are separately converted and amplified and are therefore susceptible to amplitude and phase imbalances. In addition, offsets and drifting over time and temperature plague this technique. Moreover, leakage from local oscillators used to generate IF signals is often difficult to adequately remove. Together these analog signal processing errors lead to distortions which make the transmitted signal fail to meet spectral occupancy restraints and which increase bit error rate.
Digital processing techniques have been devised to avoid many of the errors which plague the analog technique for performing the combining and mixing functions. The digital processing techniques digitally combine and mix the separate low speed, parallel data streams to achieve a digital IF signal, which is then converted to analog. One such digital technique digitally processes parallel low speed data streams through a high speed interpolator to synthesize a high speed version of the parallel low speed streams. However, the high speed interpolator is a complicated circuit requiring a large number of logic gates, causing it to consume an undesirably large amount of power.
Another such digital technique uses a direct digital synthesizer to generate a high speed digital, complex exponential signal having sine and cosine components. This high speed complex signal is then digitally mixed with the baseband data signal represented by the parallel low speed data streams using a digital complex multiplier. However, the direct digital synthesizer and complex multiplier are complicated circuits requiring a large number of logic gates and an undesirably large power consumption.
These high power consumption techniques make them unsuitable for many applications, such as battery powered devices. Moreover, while low speed, high complexity components and high speed, low complexity components are routinely and reliably manufactured inexpensively, high speed, high complexity components are often extremely expensive. Accordingly, the conventional digital techniques are impractical for mass market applications.
Increasingly stringent spectral occupancy regulations worsen the problems suffered by the conventional combining and mixing techniques. In order for the digital techniques to improve upon the errors suffered by the analog techniques, a sufficient number of bits of precision must be processed to achieve a low enough quantization error so that an improvement will result. Unfortunately, the conventional digital combining and mixing techniques achieve additional bits of precision by increasing the component complication and exacerbating already undesirable power consumption characteristics.